Lec # | TOPICS | KEY DATES |
---|---|---|
1 | Introduction to 6.774 CMOS Process Flow | |
2 | Crystal Growth, Wafer Fabrication, and Basic Properties of Si Wafers | Homework 1 out |
3 | Crystal Growth, Wafer Fabrication, and Basic Properties of Si Wafers (cont.) Wafer Cleaning and Gettering | |
4 | Wafer Cleaning and Gettering (cont.) | Homework 1 due |
5 | Wafer Cleaning and Gettering - Contamination Measurement Techniques Oxidation and the Si/SiO2 Interface - Uses of Oxides and CV Measurement Techniques | Homework 2 out |
6 | Oxidation and the Si/SiO2 Interface: Deal/Grove Model, Thin Oxide Models | |
7 | Oxidation and the Si/SiO2 Interface: 2D Effects, Doping Effects, Point Defects | Homework 2 due |
8 | Dopant Diffusion - Need for Abrupt Profiles, Fick's Laws, Simple Analytic | Homework 3 out |
9 | Dopant Diffusion - Numerical Techniques in Diffusion, E Field Effects | |
10 | Dopant Diffusion - Fermi Level Effects, I and V Assisted Diffusion | |
11 | Dopant Diffusion - Review Atomic Scale Models, Profile Measurement Techniques | Homework 3 due |
12 | Ion Implantation and Annealing - Analytic Models and Monte Carlo | |
13 | Ion Implantation and Annealing - Physics of E Loss, Damage, Introduction to TED | Homework 4 out |
14 | Transient Enhanced Diffusion (TED) - +1 Model, (311) Defects and TED Introduction | |
15 | Transient Enhanced Diffusion (TED) - Simulation Examples, TED Calculations, RSCE in detail | |
16 | The SUPREM IV Process Simulator | Homework 4 due |
17 | Thin Film Deposition and Epitaxy - Introduction to CVD, Si Epitaxial Growth | Homework 5 out |
18 | Thin Film Deposition and Epitaxy - CVD Examples and PVD | |
19 | Thin Film Deposition and Epitaxy - Modeling Topography of Deposition | Homework 5 due |
20 | Etching - Introduction | |
21 | Etching - Poly Gate Etching, Stringers, Modeling of Etching | |
22 | Silicides, Device Contacts, Novel Gate Materials | |
23 | Growth and Processing of Strained Si/SiGe and Stress Effects on Devices | |
24-26 | Report Presentations |